The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2018

Filed:

Jul. 31, 2014
Applicant:

Globalwafers Japan Co., Ltd., Niigata, JP;

Inventors:

Koji Araki, Niigata, JP;

Tatsuhiko Aoki, Niigata, JP;

Haruo Sudo, Niigata, JP;

Takeshi Senda, Niigata, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 33/02 (2006.01); H01L 21/02 (2006.01); C30B 29/06 (2006.01); C30B 15/20 (2006.01); H01L 21/322 (2006.01); H01L 21/324 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02008 (2013.01); C30B 15/206 (2013.01); C30B 29/06 (2013.01); C30B 33/02 (2013.01); H01L 21/324 (2013.01); H01L 21/3225 (2013.01); Y10T 428/24488 (2015.01); Y10T 428/31 (2015.01);
Abstract

A silicon wafer is manufactured by subjecting a silicon wafer sliced from a silicon single-crystal ingot grown by the Czochralski process to a rapid thermal process in which the silicon wafer is heated to a maximum temperature within a range of 1300 to 1380° C., and kept at the maximum temperature for 5 to 60 seconds; and removing a surface layer of the wafer where a semiconductor device is to be manufactured by a thickness of not less X [μm] which is calculated according to the below equations (1) to (3):[μm]=[μm]+[μm]  (1);[μm]=(0.0031×(said maximum temperature) [° C.]−3.1)×6.4×(cooling rate)−[° C./second]  (2); and[μm]=/(solid solubility limit of oxygen) [atoms/cm]/(oxygen concentration in substrate) [atoms/cm]  (3).


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