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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10133179 B1

PDFFull Text
Date of Patent:
Nov. 20, 2018

Filed:

Jul. 29, 2016

Pattern treatment methods

Applicants:

Rohm and Haas Electronic Materials Llc, Marlborough, MA (US);

Dow Global Technologies Llc, Midland, MI (US);

Inventors:

Jin Wuk Sung, Northborough, MA (US);

Mingqi Li, Shrewsbury, MA (US);

Jong Keun Park, Shrewsbury, MA (US);

Joshua A. Kaitz, Brighton, MA (US);

Vipul Jain, North Grafton, MA (US);

Chunyi Wu, Shrewsbury, MA (US);

Phillip D. Hustad, Natick, MA (US);

Assignees:

Rohm and Haas Electronic Materials LLC, Marlborough, MA (US);

Dow Global Technologies LLC, Midland, MI (US);

Attorney:

Jonathan D. Baskin

Primary Examiner:

Daborah Chacko-Davis

Int. Cl.
CPC ...
C09D 153/02 (2006.01); G03F 7/40 (2006.01); C09D 153/00 (2006.01); G03F 7/038 (2006.01); G03F 7/20 (2006.01); G03F 7/32 (2006.01); G03F 7/38 (2006.01); G03F 7/039 (2006.01);
U.S. Cl.
CPC ...
G03F 7/405 (2013.01); C09D 153/00 (2013.01); G03F 7/038 (2013.01); G03F 7/0397 (2013.01); G03F 7/20 (2013.01); G03F 7/32 (2013.01); G03F 7/325 (2013.01); G03F 7/38 (2013.01);
Abstract

A pattern treatment method, comprising: (a) providing a semiconductor substrate comprising a patterned feature on a surface thereof; (b) applying a pattern treatment composition to the patterned feature, wherein the pattern treatment composition comprises: a block copolymer and an organic solvent, wherein the block copolymer comprises: (i) a first block comprising a first unit formed from 4-vinyl-pyridine, and (ii) a second block comprising a first unit formed from a vinyl aromatic monomer; and (c) removing residual pattern shrink composition from the substrate, leaving a coating of the block copolymer over the surface of the patterned feature, thereby providing a reduced pattern spacing as compared with a pattern spacing of the patterned feature prior to coating the pattern treatment composition. The methods find particular applicability in the manufacture of semiconductor devices for providing high resolution patterns.

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