The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10128337 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 13, 2018

Filed:

Jun. 03, 2016
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Jie Zhou, San Jose, CA (US);

Zhong Qiang Hua, Saratoga, CA (US);

Chentsau Ying, Cupertino, CA (US);

Srinivas D. Nemani, Sunnyvale, CA (US);

Ellie Y. Yieh, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/04 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01); H01L 21/324 (2006.01); H01L 21/67 (2006.01); H01L 21/677 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02587 (2013.01); H01L 21/02639 (2013.01); H01L 21/02664 (2013.01); H01L 21/308 (2013.01); H01L 21/3065 (2013.01); H01L 21/324 (2013.01); H01L 21/67115 (2013.01); H01L 21/67742 (2013.01); H01L 21/67766 (2013.01); H01L 29/045 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

Methods for forming fin structures with desired profile and dimensions for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. The methods include a structure reshaping process to reshape a shaped structure, such as a diamond like structure formed on a fin structure. In one embodiment, a method for forming a structure on a substrate includes performing an epitaxial deposition process to form a shaped structure on a fin structure disposed on a substrate, performing a mask layer deposition process to form a mask layer having a first width on the shaped structure, and performing a mask trimming process to trim the mask layer from the first width from a second width.


Find Patent Forward Citations

Zhou, Jie. (2018). Methods for forming fin structures with desired profile for 3d structure semiconductor applications (U.S. Patent No. 10128337). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10128337

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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