The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2018

Filed:

Jun. 28, 2017
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Swayambhu P. Behera, Santa Clara, CA (US);

Shahid Shaikh, Santa Clara, CA (US);

Pramit Manna, Sunnyvale, CA (US);

Mandar B. Pandit, Milpitas, CA (US);

Tersem Summan, San Jose, CA (US);

Patrick Reilly, Pleasanton, CA (US);

Deenesh Padhi, Sunnyvale, CA (US);

Bok Hoen Kim, San Jose, CA (US);

Heung Lak Park, San Jose, CA (US);

Derek R. Witty, Fremont, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); C23C 16/26 (2006.01); C23C 16/50 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02115 (2013.01); C23C 16/26 (2013.01); C23C 16/50 (2013.01); H01L 21/02274 (2013.01); H01L 21/0337 (2013.01); H01L 21/31116 (2013.01);
Abstract

Embodiments of the disclosure relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, generating a plasma in the processing chamber at a deposition temperature of about 80° C. to about 550° C. to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers, and removing the patterned features formed from the sacrificial dielectric layer.


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