The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 2018
Filed:
Nov. 09, 2015
Applicant:
United Microelectronics Corp., Hsinchu, TW;
Inventors:
Huai-Tzu Chiang, Tainan, TW;
Sheng-Hao Lin, Hsinchu County, TW;
Hao-Ming Lee, Taichung, TW;
Yu-Ru Yang, Hsinchu County, TW;
Shih-Hsien Huang, Kaohsiung, TW;
Chien-Hung Chen, Hsinchu County, TW;
Chun-Yuan Wu, Yunlin County, TW;
Cheng-Tzung Tsai, Taipei, TW;
Assignee:
United Microelectronics Corp., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 21/225 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0615 (2013.01); H01L 21/2253 (2013.01); H01L 21/76802 (2013.01); H01L 21/76871 (2013.01); H01L 29/1033 (2013.01); H01L 29/1054 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract
Provided is a FinFET including a substrate, at least one fin and at least one gate. A portion of the at least one fin is embedded in the substrate. The at least one fin includes, from bottom to top, a seed layer, a stress relaxation layer and a channel layer. The at least one gate is across the at least one fin. A method of forming a FinFET is further provided.