The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2018
Filed:
Mar. 08, 2017
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Tien-Szu Chen, Kaohsiung, TW;
Kuang-Hsiung Chen, Kaohsiung, TW;
Sheng-Ming Wang, Kaohsiung, TW;
Yu-Ying Lee, Kaohsiung, TW;
Yu-Tzu Peng, Kaohsiung, TW;
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung, TW;
Abstract
A semiconductor package comprises a substrate, a pad, a first isolation layer, an interconnection layer, and a conductive post. The substrate has a first surface and a second surface opposite the first surface. The pad has a first portion and a second portion on the first surface of the substrate. The first isolation layer is disposed on the first surface and covers the first portion of the pad, and the first isolation layer has a top surface. The interconnection layer is disposed on the second portion of the pad and has a top surface. The conductive post is disposed on the top surface of the first isolation layer and on the top surface of the interconnection layer. The top surface of the first isolation layer and the top surface of the interconnection layer are substantially coplanar.