The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2018

Filed:

Feb. 13, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yu-Wei Lin, New Taipei, TW;

Chen-Shien Chen, Zhubei, TW;

Guan-Yu Chen, Hsinchu, TW;

Tin-Hao Kuo, Hsinchu, TW;

Yen-Liang Lin, Taichung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 24/16 (2013.01); H01L 22/12 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 24/81 (2013.01); H01L 24/13 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16105 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/8138 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/14 (2013.01); H01L 2924/381 (2013.01); H01L 2924/3841 (2013.01);
Abstract

An integrated circuit (IC) packaging substrate includes a main body, at least one first conductive line, at least one second conductive line, and at least one protrusion pad. The first conductive line is embedded in the main body. The second conductive line is embedded in the main body. The protrusion pad is disposed on the first conductive line. The protrusion pad protrudes from the main body and is configured to be in electrical contact with a solder portion of a semiconductor chip. A first spacing between the protrusion pad and the second conductive line is determined in accordance with a process deviation of the protrusion pad by the width of the protrusion pad and the width of the first conductive line. Moreover, a semiconductor package having the IC packaging substrate and a manufacturing method of the semiconductor package are also provided.


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