The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2018
Filed:
Jan. 23, 2015
Alpha & Omega Semiconductor, Incorporated, Sunnyvale, CA (US);
Wenjun Li, Portland, OR (US);
Paul Thorup, Hillsboro, OR (US);
Hong Chang, Saratoga, CA (US);
Yeeheng Lee, San Jose, CA (US);
Yang Xiang, Beaverton, OR (US);
Jowei Dun, San Jose, CA (US);
Hongyong Xue, Portland, OR (US);
Yiming Gu, Hillsboro, OR (US);
Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);
Abstract
This invention discloses a semiconductor power device disposed in a semiconductor substrate including an active cell areas and a termination area. The semiconductor power device further comprises a plurality of gate trenches formed at a top portion of the semiconductor substrate in the active cell area wherein each of the gate trenches is partially filled with a conductive gate material with a top portion of the trenches filled by a high density plasma (HDP) insulation layer. The semiconductor power device further comprises mesa areas of the semiconductor substrate disposed between the gate trenches wherein the mesa areas are recessed and having a top mesa surface disposed vertically below a top surface of the HDP insulation layer wherein the HDP insulation layer covering over the conductive gate material constituting a stick-out boundary-defining layer surrounding the recessed mesa areas in the active cell areas between the gate trenches.