The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Jan. 11, 2017
Invensas Corporation, San Jose, CA (US);
Hong Shen, Palo Alto, CA (US);
Liang Wang, Milpitas, CA (US);
Gabriel Z. Guevara, San Jose, CA (US);
Rajesh Katkar, San Jose, CA (US);
Cyprian Emeka Uzoh, San Jose, CA (US);
Laura Wills Mirkarimi, Sunol, CA (US);
INVENSAS CORPORATION, San Jose, CA (US);
Abstract
An interposer () has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs). The interposer includes a substrate made of multiple layers (). Each layer can be a substrate (S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure () made of vertical layers () corresponding to the interposers' layers. The structure is diced along horizontal planes () to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.