The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2018

Filed:

Aug. 22, 2012
Applicants:

Shinji Okada, Kumamoto, JP;

Masatoshi Shiraishi, Kumamoto, JP;

Masatoshi Deguchi, Kumamoto, JP;

Xavier Francois Brun, Chandler, AZ (US);

Charles Wayne Singleton, Jr., Chandler, AZ (US);

Kabirkumar Mirpuri, Chandler, AZ (US);

Inventors:

Shinji Okada, Kumamoto, JP;

Masatoshi Shiraishi, Kumamoto, JP;

Masatoshi Deguchi, Kumamoto, JP;

Xavier Francois Brun, Chandler, AZ (US);

Charles Wayne Singleton, Jr., Chandler, AZ (US);

Kabirkumar Mirpuri, Chandler, AZ (US);

Assignees:

Tokyo Electron Limited, Tokyo, JP;

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/66 (2006.01); H01L 21/67 (2006.01); H01L 21/02 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); H01L 21/02068 (2013.01); H01L 21/6715 (2013.01); H01L 21/67017 (2013.01); H01L 21/67092 (2013.01); H01L 21/6835 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01); Y10T 156/1911 (2015.01);
Abstract

A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing target wafer is removed by supplying an organic solvent onto the joint surface of the processing target wafer. Then, an oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed by supplying acetic acid to the joint surface of the processing target wafer. Then, the joint surface of the processing target wafer is inspected. Then, based on an inspection result, the adhesive on the joint surface of the processing target wafer is removed and the oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed.


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