Hangzhou, China

Zheng Lyu

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Silergy Semiconductor Technology (Hangzhou) Ltd. Active years: 2017-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zheng Lyu. Retrieved from https://idiyas.com/inventor/zheng-lyu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 1


Company Filing History:


Years Active: 2017-2019

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3 patents (USPTO):Explore Patents

Title: Zheng Lyu: Innovator in CMOS Technology

Introduction

Zheng Lyu is a prominent inventor based in Hangzhou, China, known for his contributions to the field of semiconductor technology. With a total of three patents to his name, he has made significant advancements in the manufacturing processes of CMOS structures.

Latest Patents

Zheng Lyu's latest patents focus on innovative methods for manufacturing CMOS structures. One of his patents describes a process where a first gate stack is formed on a semiconductor substrate in a designated region. A second gate stack is then created in another region, utilizing the gate stacks as hard masks for implanting dopants. This method allows for the formation of lightly-doped drain regions of different types, enhancing the efficiency of the semiconductor devices. Another patent outlines a similar process involving shallow trench isolation, where multiple gate stacks are formed with varying thicknesses of gate dielectrics. This approach reduces the number of masks required during the manufacturing process, streamlining production.

Career Highlights

Zheng Lyu is currently employed at Silergy Semiconductor Technology (Hangzhou) Ltd., where he continues to innovate in the semiconductor industry. His work has been instrumental in developing advanced manufacturing techniques that improve the performance and reliability of CMOS technology.

Collaborations

Throughout his career, Zheng has collaborated with notable colleagues, including Budong You and Xianguo Huang. These partnerships have fostered a collaborative

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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