San Jose, CA, United States of America

Yuri Apanovich

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Advanced Micro Devices Corporation. Active years: 2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yuri Apanovich. Retrieved from https://idiyas.com/inventor/yuri-apanovich

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Innovations by Yuri Apanovich

Introduction

Yuri Apanovich is a notable inventor based in San Jose, CA (US). He has made significant contributions to the field of integrated circuit design, particularly in the area of reliability analysis for deep sub-micron technologies. His work has implications for the performance and longevity of electronic devices.

Latest Patents

Yuri holds a patent titled "Interconnect and transistor reliability analysis for deep sub-micron designs." This patent presents a system and method for providing a statistical budgeting approach to modeling reliability effects such as interconnect electromigration (EM), transistor time-dependent dielectric breakdown (TDDB), hot-carrier injection effects (HCI), and bias temperature instability (BTI). The static analysis flow described in the patent captures the effects of design topology, switching constraints, interactions between signal nets and supply rails, as well as thermal gradients due to interconnect and transistor self and mutual heating. This innovative approach has been utilized to verify successive iterations of deep sub-micron integrated circuit designs.

Career Highlights

Yuri Apanovich is currently employed at Advanced Micro Devices Corporation, a leading company in the semiconductor industry. His expertise in reliability analysis has positioned him as a valuable asset in the development of cutting-edge technologies.

Collaborations

Yuri has collaborated with esteemed colleagues such as Tom Burd and Srinivasaraghavan Krishnamoorthy. Their combined efforts have contributed to advancements in the field of integrated circuit design and reliability.

Conclusion

Yuri Apanovich's innovative work in reliability analysis for deep sub-micron designs showcases his significant contributions to the field of electronics. His patent and collaborations reflect his commitment to advancing technology and improving the performance of integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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