Yung-Sheng Yu

Title: Yung-Sheng Yu: Innovator in High-Level Language Compilation

Introduction

Yung-Sheng Yu is a notable inventor based in Columbia, MD (US). He has made significant contributions to the field of hardware scheduling through high-level language compilation. His innovative approach aims to preserve the functionality of source code design implementations.

Latest Patents

Yung-Sheng Yu holds a patent for a method titled "Scheduling hardware generated by high level language compilation to preserve functionality of source code design implementations." This patent outlines a process for determining a hardware representation of a general-purpose, high-level language program. The method includes compiling the program to generate a language-independent model and identifying data input to each component specified in the model to determine latency for each component. The components can be annotated for the generation of control signals, ensuring that each component is activated when both control and valid data arrive. Additionally, each component is annotated with an output latency derived from the control signal's latency and the execution latency of the component itself.

Career Highlights

Yung-Sheng Yu is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work focuses on enhancing the efficiency and functionality of hardware design through innovative software solutions. His contributions have been instrumental in advancing the capabilities of high-level language compilation.

Collaborations

Yung-Sheng Yu has collaborated with esteemed colleagues such as Stephen G. Edwards and Donald J. Davis. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Yung-Sheng Yu's work in high-level language compilation and hardware scheduling exemplifies the impact of innovative thinking in technology. His contributions continue to influence the field and pave the way for future advancements.