Icheon, South Korea

Yun Sun Choi

This inventor holds 1 USPTO granted patent. Top assignees: Enf Technology Co., Ltd., Skhynix Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yun Sun Choi. Retrieved from https://idiyas.com/inventor/yun-sun-choi-7fodyve9

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yun Sun Choi and Semiconductor Substrate Cleaning Innovation.

Introduction

Yun Sun Choi is an inventor associated with Icheon, South Korea. His patent work addresses a challenge in semiconductor manufacturing: cleaning fine, high-aspect-ratio patterns while helping prevent their collapse.

Latest Patents

The provided information identifies one patent for Choi: “Cleaning Agent Composition for Substrate for Semiconductor Devices and Method for Cleaning Substrate for Semiconductor Devices Using the Same.” The disclosure describes a cleaning composition containing a silicon-based compound represented by Formula 1 and an aprotic organic solvent with a dielectric constant of 10 or less. The composition can form a protective film on the substrate surface, helping preserve delicate patterns during wet cleaning and potentially improve semiconductor manufacturing yield. Choi is credited with 1 patent in the information provided.

Career Highlights

Choi is associated with Enf Technology Co., Ltd. and SK hynix Inc. The patent’s focus on protecting fine semiconductor structures during cleaning reflects the importance of materials and process innovations in device manufacturing.

Collaborations

The provided information lists Hye Ji Kim and JinHo You as Choi’s coworkers. Their specific roles in the patent or related work are not stated.

Conclusion

Yun Sun Choi’s identified patent concerns a protective cleaning composition and method designed to help maintain fragile semiconductor patterns during wet processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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