Gunma, Japan

Yuji Kawaura

This inventor holds 1 USPTO granted patent. Top assignee: Shin-Etsu Handotai Co., Ltd.. Active years: 1998.


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 1998

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1 patent (USPTO):Explore Patents

Title: Yuji Kawaura: Innovator in Semiconductor Polishing Technology

Introduction

Yuji Kawaura is a notable inventor based in Gunma, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the area of polishing methods. His innovative approach has led to the development of a unique backing pad that enhances the flatness of semiconductor wafers.

Latest Patents

Kawaura holds a patent for a "Backing pad and method for polishing semiconductor wafer therewith." This invention features a backing pad designed to support semiconductor wafers, allowing for an advanced flatness of their mirror-polished surfaces, even for larger-sized wafers. The backing pad is characterized by a smoothly finished wafer holding surface, which includes a lattice of grooves that extend toward the outer periphery. Made from polyurethane poromerics, the backing pad contains isolated pores, ensuring consistent width and depth of the grooves across the entire surface.

Career Highlights

Kawaura is associated with Shin-Etsu Handotai Co., Ltd., a leading company in the semiconductor industry. His work has been instrumental in improving the efficiency and quality of semiconductor wafer polishing processes. His innovative designs have set new standards in the industry.

Collaborations

Kawaura has collaborated with notable colleagues, including Hiromasa Hashimoto and Kenji Kasai. Their combined expertise has contributed to advancements in semiconductor technology.

Conclusion

Yuji Kawaura's contributions to semiconductor polishing technology exemplify the impact of innovation in the industry. His patented backing pad design represents a significant advancement, enhancing the quality of semiconductor wafers.

Profile summary based on public USPTO records.
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