Yue Li

Title: Yue Li - Innovator in Harmonic Balance Analysis

Introduction

Yue Li is a notable inventor based in Milpitas, CA (US). She has made significant contributions to the field of harmonic balance analysis, particularly in memory usage estimation. Her innovative approach aids in optimizing computing resources for circuit analysis.

Latest Patents

Yue Li holds a patent titled "Harmonic balance analysis memory usage estimation." This invention provides a system and method to estimate the memory required for harmonic balance analysis. It involves measuring the memory allocated for a circuit database, determining the problem size, calculating the memory for matrices and vectors, and estimating additional memory for completing a Newton iteration. The total memory needed is the sum of measured, calculated, and estimated values, providing both lower and upper bounds for memory usage. This information is invaluable for circuit designers and simulation tools.

Career Highlights

Yue Li is currently employed at Cadence Design Systems, Inc., where she continues to develop innovative solutions in electronic design automation. Her work focuses on enhancing the efficiency of circuit analysis and simulation processes.

Collaborations

Yue collaborates with her coworker, Vuk Borich, who is also a talented professional in the field. Together, they contribute to advancements in technology and design methodologies.

Conclusion

Yue Li's contributions to harmonic balance analysis and memory estimation are pivotal in the realm of electronic design. Her innovative patent and ongoing work at Cadence Design Systems, Inc. highlight her role as a key inventor in this specialized field.