Hsinchu, Taiwan

Yu-Tso Lin

This inventor holds 1 USPTO granted patent. Top assignee: Powertech Technology Inc.. Active years: 2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu-Tso Lin. Retrieved from https://idiyas.com/inventor/yu-tso-lin-epk09mpe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2018

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1 patent (USPTO):Explore Patents

Title: Innovations of Yu-Tso Lin in Multi-Chip Packaging Technology

Introduction

Yu-Tso Lin is a notable inventor based in Hsinchu County, Taiwan. He has made significant contributions to the field of semiconductor packaging, particularly in the development of multi-chip stacked package structures. His innovative approach has led to advancements that enhance the efficiency and performance of electronic devices.

Latest Patents

Yu-Tso Lin holds a patent for a "Thin fan-out multi-chip stacked package structure and manufacturing method thereof." This invention features a thin fan-out multi-chip stacked package that includes multiple stacked chips. The design allows for the electrodes of the stacked chips and the active surface of the top chip to be exposed. The structure incorporates a dummy spacer and an alignment structure over the active surface. Each bonding wire is designed with a bonding thread connected to a chip electrode and a vertical wire segment. The encapsulation of the chip stacked structure and bonding wires is achieved through a flat encapsulant, which also exposes polished cross-sectional surfaces of the bonding wires and the alignment structure. A redistribution layer structure is formed on the flat surface, and a passivation layer covers it, exposing the polished surfaces and alignment structure. Fan-out circuits are then created on the passivation layer, connecting to the polished surfaces of the bonding wires and alignment structure.

Career Highlights

Yu-Tso Lin is currently employed at Powertech Technology Inc., where he continues to innovate in the semiconductor industry. His work has been instrumental in advancing packaging technologies that are crucial for modern electronics.

Collaborations

Yu-Tso Lin collaborates with talented individuals such as Chia-Wei Chang and Yong-Cheng Chuang, contributing to a dynamic team focused on cutting-edge technology.

Conclusion

Yu-Tso Lin's contributions to multi-chip packaging technology exemplify the innovative spirit of modern inventors. His patent reflects a significant advancement in the field, showcasing his expertise and commitment to enhancing electronic device performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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