This inventor holds 1 USPTO granted patent. Top assignee: Powertech Technology Inc.. Active years: 2014.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2014
Title: Yu-Shin Liu: Innovator in Wafer-Level Testing
Introduction
Yu-Shin Liu is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of wafer-level testing for multi-chip stacked packages. His innovative approach has the potential to enhance the efficiency and effectiveness of testing processes in the semiconductor industry.
Latest Patents
Yu-Shin Liu holds a patent titled "Method for wafer-level testing diced multi-chip stacked packages." This patent discloses a method for wafer-level testing a plurality of diced multi-chip stacked packages. Each package includes a plurality of chips with vertically electrical connections such as Through-Silicon Vias (TSVs). According to a die-on-wafer array arrangement, the multi-chip stacked packages are fixed on a transparent reconstructed wafer by a photo-sensitive adhesive. The packages are located within the component-bonding area of the wafer. The transparent reconstructed wafer carrying the multi-chip stacked packages can then be loaded into a wafer tester for probing. This method allows wafer testing probers in the wafer tester to probe the testing electrodes of the stacked packages, facilitating integration into TSV packaging processes.
Career Highlights
Yu-Shin Liu is currently employed at Powertech Technology Inc., a leading company in the semiconductor packaging and testing industry. His work focuses on advancing testing methodologies that improve the reliability and performance of semiconductor devices. His innovative contributions have positioned him as a key figure in the field.
Collaborations
Yu-Shin Liu has collaborated with notable colleagues, including Kai-Jun Chang and Shin-Kung Chen. These collaborations have fostered a productive environment for innovation and have led to advancements in semiconductor testing technologies.
Conclusion
Yu-Shin Liu's contributions to wafer-level testing represent a significant advancement in semiconductor technology. His innovative methods and collaborative efforts continue to shape the future of the industry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile