This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2002.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2002
Title: Yu-Shen Chen: Innovator in DRAM Technology
Introduction
Yu-Shen Chen is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in dynamic random-access memory (DRAM) devices. His innovative approach has led to advancements that enhance the performance and efficiency of these critical components in modern electronics.
Latest Patents
Yu-Shen Chen holds a patent for a method to reduce bit line capacitance in cub DRAMs. This patent introduces a new method for creating the bit line contact plug. In traditional designs, parasitic capacitance exists between the CUB capacitors and the contact plug due to their proximity. By creating an air gap that partially replaces the dielectric between the CUB and the bit line contact plug, the dielectric constant at the interface is reduced. This innovation allows for the development of taller CUB capacitors, making DRAM devices better suited for the era of sub-micron device dimensions. He has 1 patent to his name.
Career Highlights
Yu-Shen Chen is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading player in the semiconductor industry. His work focuses on enhancing DRAM technology, which is essential for the performance of various electronic devices. His expertise and innovative mindset have positioned him as a valuable asset in the field.
Collaborations
Yu-Shen Chen has collaborated with Chih-Hsing Yu, contributing to advancements in semiconductor technology. Their partnership has fostered innovation and has led to significant developments in the industry.
Conclusion
Yu-Shen Chen's contributions to DRAM technology exemplify the impact of innovative thinking in the semiconductor industry. His patent for reducing bit line capacitance showcases his commitment to advancing technology for future applications.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile