Tokyo, Japan

Yu Nagahama

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Renesas Electronics Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu Nagahama. Retrieved from https://idiyas.com/inventor/yu-nagahama

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yu Nagahama: Innovator in Semiconductor Manufacturing

Introduction: Yu Nagahama is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor manufacturing. His innovative approach has led to the development of a unique method that enhances the efficiency and effectiveness of semiconductor devices.

Latest Patents: Yu Nagahama holds 1 patent for his invention titled "Method of manufacturing semiconductor device." This patent describes a process where a trench is formed in a semiconductor substrate. A first silicon oxide film is created inside the trench, followed by the formation of a poly-crystalline silicon film on this oxide film. A second silicon oxide film is then produced from the poly-crystalline silicon film through a thermal oxidation treatment. This process results in an insulating film that includes both the first and second silicon oxide films. Finally, a first conductive film is embedded inside the trench via the insulating film.

Career Highlights: Yu Nagahama is currently associated with Renesas Electronics Corporation, a leading company in the semiconductor industry. His work at Renesas has allowed him to apply his innovative ideas in a practical setting, contributing to advancements in semiconductor technology.

Conclusion: Yu Nagahama's contributions to semiconductor manufacturing exemplify the impact of innovation in technology. His patented method showcases his expertise and commitment to enhancing the efficiency of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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