This inventor holds 1 USPTO granted patent. Top assignee: Mstar Semiconductor, Inc.. Active years: 2015.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2015
Title: Yu-Min Yeh and His Asymmetric Delay Circuit
Introduction
Yu-Min Yeh is an inventor associated with Hsinchu, Taiwan. His patent work includes an asymmetric delay circuit designed to receive an input signal and generate a delayed output signal.
Latest Patents
Yeh is credited with 1 patent, titled “Asymmetric Delay Circuit.” The invention uses two delay modules in sequence. A first delay unit generates a delayed signal from the input, and a first logic unit combines that signal with the input to produce an intermediate delayed output. A second delay unit processes the intermediate signal, while a second logic unit uses it and the input to generate the final delayed output.
Career Highlights
Yeh is associated with Mstar Semiconductor, Inc. His patent describes a circuit architecture that coordinates delay units and logic units to produce a delayed signal.
Collaborations
Huimin Tsai is identified as Yeh’s coworker.
Conclusion
Yu-Min Yeh’s patent on an asymmetric delay circuit reflects his work on signal-delay design and semiconductor technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile