The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Oct. 16, 2013
Applicant:

Mstar Semiconductor, Inc., Hsinchu Hsien, TW;

Inventors:

Huimin Tsai, Hsinchu Hsien, TW;

Yu-Min Yeh, Hsinchu Hsien, TW;

Assignee:

MStar Semiconductor, Inc., Hsinchu Hsien, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H 11/26 (2006.01); H03K 5/159 (2006.01); H03K 5/04 (2006.01);
U.S. Cl.
CPC ...
H03K 5/159 (2013.01); H03K 5/04 (2013.01);
Abstract

A delay circuit for receiving an input signal and generating a delayed output signal. The delay circuit includes a first delay module and a second delay module. The first delay module includes a first delay unit for generating a first delayed signal according to an input signal and a first logic unit, coupled to the first delay unit, for generating a first delayed output signal according to the first delayed signal and the input signal. The second delay module includes a second delay unit for generating a second delayed signal according to the first delayed output signal and a second logic unit, coupled to the second delay unit, for generating the delayed output signal according to the second delayed signal and the input signal.


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