This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.
Company Filing History:
Years Active: 2026
Title: Yu-Chung Lai: Innovator in Semiconductor Interconnect Structures
Introduction
Yu-Chung Lai is an inventor based in Taichung, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the design of interconnect structures. Although he currently holds no granted patents, his innovative ideas are reflected in his patent applications.
Latest Patent Applications
One of Yu-Chung Lai's notable patent applications is titled "VIA WITH SACRIFICIAL STRESS BARRIER RING." This application describes an interconnect structure on a semiconductor die that includes a lower conductive layer, an upper conductive layer, and a VIA situated between the two. The VIA features a primary interconnect structure and a sacrificial stress barrier ring that surrounds it, maintaining a specific distance from the primary structure. The fabrication method outlined in the application involves forming a dielectric layer over the lower conductive layer and patterning a photoresist layer to define the location for multiple VIA trenches. This innovative approach aims to enhance the performance and reliability of semiconductor devices.
Conclusion
Yu-Chung Lai's work in semiconductor interconnect structures showcases his inventive spirit and dedication to advancing technology. His patent application reflects a promising direction in the field, and it will be interesting to see how his ideas develop in the future.