Hsinchu, Taiwan

Yu-Chih Lin

This inventor holds 1 USPTO granted patent. Top assignee: Powerchip Semiconductor Manufacturing Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu-Chih Lin. Retrieved from https://idiyas.com/inventor/yu-chih-lin-is632oa0

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yu-Chih Lin and Wafer Optical Inspection

Introduction

Yu-Chih Lin is an inventor based in Hsinchu, Taiwan. His patent work concerns optical inspection technology for semiconductor wafers.

Latest Patents

The provided information lists one patent for Lin: “Wafer Optical Inspection System and Inspection Method.” The system uses an image-capturing device with a photosensitive device, an LED source, and a laser source. The LED creates a reflective feature at the edge of a batch of wafers, while the laser creates a contour feature. The photosensitive device captures a side image containing the wafer group and both features. An image-recognition device then uses that image to identify the number and positions of the wafers in the batch. Lin is credited with 1 patent.

Career Highlights

Lin is associated with Powerchip Semiconductor Manufacturing Corporation. His listed patent addresses wafer inspection and image recognition, supporting the identification and positioning of wafers in a batch.

Collaborations

The provided information names Ke-Fen Chen and Lin-Ho Ko as Lin’s coworkers. It does not specify their roles in the patent or describe particular collaborations.

Conclusion

Yu-Chih Lin’s listed invention combines optical features and image recognition to determine wafer counts and positions, reflecting his work in semiconductor inspection technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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