Hsinchu, Taiwan

Yow-Tyng Nieh

This inventor holds 4 USPTO granted patents and 1 published patent application. Top assignees: Industrial Technology Research Institute, Chung Yuan Christian University, National Tsing Hua University. Active years: 2008-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yow-Tyng Nieh. Retrieved from https://idiyas.com/inventor/yow-tyng-nieh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 75.0

Average Co-Inventor Count = 3.7

ph-index = 2

Forward Citations = 10(Granted Patents)


Location History:

  • Hsinchu, TW (2008 - 2011)
  • Hsinchu County, TW (2010 - 2016)

Company Filing History:


Years Active: 2008-2016

Loading Chart...
4 patents (USPTO):Explore Patents

Title: Yow-Tyng Nieh: Innovator in Circuit Design

Introduction

Yow-Tyng Nieh is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of circuit design, particularly in the development of innovative clock tree architectures. With a total of 4 patents to his name, Nieh's work has had a substantial impact on modern electronic design.

Latest Patents

One of his latest patents is titled "Clock tree in circuit having a power-mode control circuit to determine a first delay time and a second delay time." This invention provides a clock tree that includes multiple sub clock trees and voltage-controllable power-mode-aware (PMA) buffers. The PMA buffers delay a system clock to serve as a delayed clock, which is then provided to the sub clock trees. The power-mode control circuit plays a crucial role by supplying power information to function modules, determining their power modes accordingly.

Another notable patent is the "Opposite-phase scheme for peak current reduction." This innovative approach divides clock buffers into two sets, with one set operating in phase with the clock source and the other set operating in the opposite phase. This method effectively reduces the peak current of the clock tree and can be integrated with electronic design automation (EDA) tools commonly used in the industry.

Career Highlights

Yow-Tyng Nieh has worked with esteemed organizations such as the Industrial Technology Research Institute and Chung Yuan Christian University. His experience in these institutions has allowed him to collaborate with other experts in the field and further his research in circuit design.

Collaborations

Nieh has collaborated with notable colleagues, including Shih-Hsu Huang and Sheng-Yu Hsu. Their combined expertise has contributed to the advancement of innovative solutions in circuit design.

Conclusion

Yow-Tyng Nieh is a distinguished inventor whose work in circuit design continues to influence the industry. His innovative patents and collaborations highlight his commitment to advancing technology in electronic design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…