Santa Clara, CA, United States of America

Youcef Bourai


Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2022-2023

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2 patents (USPTO):Explore Patents

Title: Innovations by Youcef Bourai

Introduction

Youcef Bourai is an accomplished inventor based in Santa Clara, California. He has made significant contributions to the field of network-on-chip (NoC) technology, focusing on optimizing data traffic and load balancing in interconnected systems. With two patents to his name, Bourai's work is paving the way for advancements in efficient data routing.

Latest Patents

Youcef Bourai's latest patents include a "System and method to determine optimal path(s) and use load balancing in an interconnect." This invention describes a system for finding the best routes from a master to each of its connected slaves within a network-on-chip. The system is designed to avoid deadlock scenarios while efficiently managing data traffic. Another notable patent is the "System and method for synthesis of a network-on-chip to determine optimal path with load balancing." This patent also focuses on optimizing routes in a two-dimensional mesh topology, ensuring that data packets are effectively serviced by the connected slaves.

Career Highlights

Youcef Bourai is currently employed at Arteris, Inc., where he continues to innovate in the field of network-on-chip technology. His work is instrumental in enhancing the performance and reliability of interconnected systems.

Collaborations

Some of his notable coworkers include Syed Ijlal Ali Shah and Khaled Labib, who contribute to the collaborative environment at Arteris, Inc.

Conclusion

Youcef Bourai's contributions to network-on-chip technology through his innovative patents demonstrate his expertise and commitment to advancing the field. His work is essential for the future of efficient data routing and load balancing in interconnected systems.

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