Suwon, South Korea

Yong Seok Choi

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Semcns Co., Ltd.. Active years: 2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yong Seok Choi. Retrieved from https://idiyas.com/inventor/yong-seok-choi-j5e1u

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2018

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1 patent (USPTO):Explore Patents

Title: Yong Seok Choi: Innovator in Probe Card Technology

Introduction

Yong Seok Choi is a notable inventor based in Suwon-Si, South Korea. He has made significant contributions to the field of electronics through his innovative designs and patents. His work primarily focuses on enhancing the functionality and efficiency of probe cards used in semiconductor testing.

Latest Patents

Yong Seok Choi holds a patent for a probe card that features a lead part designed to remove excessive solder. This invention includes a ceramic substrate, an electrode connection part, and a bonding pad that is strategically placed to manage solder overflow. The design allows for better performance during the attachment of probes, ensuring that any excess solder is effectively dispersed.

Career Highlights

Choi's career is marked by his dedication to advancing semiconductor technology. His work at Semcns Co., Ltd. has positioned him as a key player in the industry. He has successfully developed solutions that address common challenges faced in semiconductor testing.

Collaborations

Yong Seok Choi has collaborated with talented individuals such as Doo Yun Chung and Dae Hyeong Lee. These partnerships have fostered innovation and contributed to the success of their projects.

Conclusion

Yong Seok Choi's contributions to probe card technology exemplify his commitment to innovation in the semiconductor industry. His patent reflects a deep understanding of the technical challenges in this field, and his work continues to influence the development of more efficient testing solutions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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