Yong Chen

Title: Yong Chen and His Work on 3D NAND Memory Technology

Introduction

Yong Chen is an inventor associated with Liaoning, China, and Intel Ndtm US LLC. His patent work addresses a fabrication challenge in vertical 3D NAND memory: forming reliable wordline contacts in staircase regions.

Latest Patents

The provided information lists one patent for Chen: Selective Etch Stop for Wordline Contacts in Vertical 3D NAND Staircase Regions. The disclosed apparatus includes a vertical 3D NAND memory array, a staircase region, a polysilicon wordline, and a vertical contact that connects to the wordline. An etch-stop material surrounds the contact and lies on the wordline, extending to the step’s outside corner while remaining absent from the step sidewall and undercut at the corner. The patent describes embodiments intended to support selective etching in this structure. Chen is credited with 1 patent in the supplied data.

Career Highlights

The available information connects Chen’s patent activity with Intel Ndtm US LLC. His listed invention concerns the structure and placement of etch-stop material around wordline contacts in 3D NAND staircase regions.

Collaborations

Sijia Li and Zhiyuan Yu are identified as Chen’s coworkers. The supplied information does not specify their roles in the patent or whether they collaborated with him on this invention.

Conclusion

Yong Chen’s listed patent focuses on selective etch-stop design for wordline contacts in vertical 3D NAND staircase regions, reflecting work on a specific challenge in memory-device fabrication.