Moradabad, India

Yogendra Pratap Singh

This inventor holds 1 USPTO granted patent. Top assignee: Infineon Technologies Americas Corp.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yogendra Pratap Singh. Retrieved from https://idiyas.com/inventor/yogendra-pratap-singh-atczfwn7

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yogendra Pratap Singh: Inventor in Power FET Current Sensing

Introduction

Yogendra Pratap Singh is an inventor associated with Moradabad, India, and Infineon Technologies Americas Corp. His work includes a patented approach to sensing load current in common-drain power switches built with vertical FET technology.

Latest Patents

Singh is associated with 1 patent: “Current Sensing Implementation for Common-Drain, Back-to-Back Power Switches in Vertical FET Technology.” The invention describes a power device containing back-to-back FETs connected to a common drain node. A first replica FET provides a sense current representative of the load current, while a second replica FET provides a sense voltage representative of the common-drain-node voltage. A current-sense circuit uses that voltage to draw the sense current through the first replica FET, enabling load-current sensing.

Career Highlights

Singh’s patent work addresses current sensing in power-switch architectures. The described implementation uses replica FETs and a current-sense circuit to derive a signal representative of the load current.

Collaborations

Singh’s listed coworkers include Ramakrishna Venigalla and Partha Mondal. His patent is associated with Infineon Technologies Americas Corp.

Conclusion

Yogendra Pratap Singh’s patent describes a replica-FET-based technique for sensing load current in common-drain, back-to-back power switches.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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