Allen, TX, United States of America

Yinbao Yang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Qorvo US, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yinbao Yang. Retrieved from https://idiyas.com/inventor/yinbao-yang-7hevegii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yinbao Yang and Microelectronics Packaging Innovation.

Introduction

Yinbao Yang is an inventor based in Allen, Texas, and works at Qorvo US, Inc. His patent work addresses reliability in microelectronics packaging, with a focus on reducing delamination and cracking at solder joints.

Latest Patents

Yang is associated with 1 patent: “Delamination/cracking improvement at solder joints in microelectronics package.” The invention describes a microelectronics package and a process for making it, designed to reduce delamination and cracking around solder joints.

The package includes a carrier, a solder joint region, a top intermetallic layer, and a device die. The die’s backside metal layer is made of gold and is at least 0.5 μm thick. The top intermetallic layer comprises gold-nickel-tin or gold-platinum-tin, while the solder joint region contains an Au-rich gold-tin and gold-tin eutectic mixture.

Career Highlights

Yang’s disclosed invention focuses on materials and layer structures that can improve the durability of solder-joint interfaces in microelectronics packages. This work is relevant to package reliability, where cracking and delamination can affect device performance and service life.

Collaborations

Yang’s listed coworkers include Xiaokang Huang and Kenneth Frazee. His patent is associated with Qorvo US, Inc.

Conclusion

Yinbao Yang’s patent describes a materials-based approach to reducing solder-joint delamination and cracking, contributing to more reliable microelectronics packaging.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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