Hsinchu, Taiwan

Yin-Fa Chen

This inventor holds 1 USPTO granted patent. Top assignee: Mediatek Corporation. Active years: 2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yin-Fa Chen. Retrieved from https://idiyas.com/inventor/yin-fa-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2024

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1 patent (USPTO):Explore Patents

Title: Innovations of Yin-Fa Chen

Introduction

Yin-Fa Chen is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology. His work focuses on enhancing the reliability of semiconductor packages, which is crucial for various electronic applications.

Latest Patents

Yin-Fa Chen holds a patent for a semiconductor package with improved board level reliability. This innovative design includes a die attach pad, a plurality of lead terminals positioned around the die attach pad, a semiconductor die mounted on the pad, and a molding compound that encapsulates both the lead terminals and the semiconductor die. Additionally, the design features at least one dummy lead located in a corner region of the package, enhancing its structural integrity. He has 1 patent to his name.

Career Highlights

Yin-Fa Chen is currently employed at MediaTek Corporation, a leading company in the semiconductor industry. His role involves research and development, where he applies his expertise to create advanced semiconductor solutions. His contributions have been instrumental in improving product performance and reliability.

Collaborations

Yin-Fa Chen has worked alongside talented colleagues, including Chin-Chiang Chang and Shih-Chin Lin. Their collaborative efforts have led to innovative advancements in semiconductor technology.

Conclusion

Yin-Fa Chen's work exemplifies the spirit of innovation in the semiconductor industry. His patent for a semiconductor package with improved reliability showcases his commitment to enhancing technology. His contributions continue to impact the field positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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