Yilan, Taiwan

Yi-Hung Chen

This inventor holds 4 USPTO granted patents and 1 published patent application and 1 EPO patent. Top assignees: Mediatek Corporation, Nephos (Hefei) Co. Ltd.. Active years: 2018-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Hung Chen. Retrieved from https://idiyas.com/inventor/yi-hung-chen-fowpt3hj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 100.0

 

Average Co-Inventor Count = 2.2

ph-index = 3

Forward Citations = 16(Granted Patents)


Company Filing History:


Years Active: 2018-2019

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4 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Yi-Hung Chen in Wafer-Level Packaging**

Introduction

Yi-Hung Chen, an inventive mind based in Yilan County, Taiwan, has made significant strides in the field of semiconductor packaging technology. With four patents to his name, Chen's work exemplifies cutting-edge innovations that enhance the efficiency and functionality of wafer-level packages.

Latest Patents

Chen's latest patents include two notable inventions that focus on improving wafer-level packaging. The first patent, titled "Wafer-level package having multiple dies arranged in side-by-side fashion and associated yield improvement method," describes a wafer-level package featuring a plurality of dies arranged side by side. This design allows for efficient connection paths between input/output (I/O) pads on adjacent dies, facilitating advanced functionalities such as network switching. The second patent, "Wafer-level package having one die with its clock source shared by multiple dies and associated clock generating method," outlines a design where a shared clock source improves synchronization between multiple dies, enhancing overall package performance.

Career Highlights

Throughout his career, Yi-Hung Chen has been associated with renowned companies in the technology sector. He has worked at MediaTek Corporation, a leading semiconductor company, where he contributed to various innovative projects. Additionally, his work at Nephos (Hefei) Co. Ltd. has furthered his expertise in wafer-level packaging technologies, enabling him to develop groundbreaking inventions.

Collaborations

During his professional journey, Yi-Hung Chen has collaborated with esteemed colleagues such as Yuan-Chin Liu and Chun-Kai Huang. These collaborations have fostered an environment of creativity and innovation, allowing for the successful development of advanced wafer-level packaging solutions.

Conclusion

Yi-Hung Chen stands out as a dynamic inventor whose contributions to wafer-level packaging have the potential to transform the semiconductor industry. With his innovative patents and collaborative spirit, Chen continues to push the boundaries of technology, paving the way for future advancements in this critical field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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