Yi-Hao Hsu

Title: Yi-Hao Hsu: Innovator in Timing Analysis Technology

Introduction

Yi-Hao Hsu is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of timing analysis, particularly in programmable logic array systems. His innovative approach has led to the development of a unique device that enhances the efficiency of timing analysis.

Latest Patents

Yi-Hao Hsu holds a patent for a "Device and method for performing timing analysis." This device is designed to perform timing analysis in a programmable logic array system. It includes first and second basic I/O terminals, a channel multiplexer, high-speed I/O terminals, a sampling module, and a timing analysis module. The first basic I/O terminals receive under-test signals from an under-test unit. The channel multiplexer selects at least a group of these signals to be outputted to the second basic I/O terminals. The high-speed I/O terminals operate at a logic level analyzing speed that surpasses that of the basic I/O terminals. The sampling module captures the group of under-test signals and generates a sample result, while the timing analysis module conducts timing analysis based on this result. Yi-Hao Hsu has 1 patent to his name.

Career Highlights

Yi-Hao Hsu is currently employed at Test Research, Inc., where he continues to innovate and develop advanced technologies. His work has been instrumental in improving the accuracy and speed of timing analysis in various applications.

Collaborations

One of his notable coworkers is Yu-Chen Shen, with whom he collaborates on various projects within the company.

Conclusion

Yi-Hao Hsu's contributions to timing analysis technology demonstrate his commitment to innovation and excellence in the field. His patent reflects a significant advancement that benefits programmable logic array systems.