Hsinchu, Taiwan

Yew-Jung Chang

This inventor holds 1 USPTO granted patent. Top assignee: Mosel Vitelic Corporation. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yew-Jung Chang. Retrieved from https://idiyas.com/inventor/yew-jung-chang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: Yew-Jung Chang: Innovator in Semiconductor Technology

Introduction

Yew-Jung Chang is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative methods in forming oxide layers in trench structures.

Latest Patents

Yew-Jung Chang holds 1 patent for his invention titled "Method of forming bottom oxide layer in trench structure." This patent describes a method that includes providing a semiconductor substrate and forming a trench structure within it. The process involves performing a Plasma-Enhanced Chemical Vapor Deposition (PECVD) with Tetraethyl Orthosilicate (TEOS) as a source to deposit an oxide layer on the bottom and sidewalls of the trench structure. The method further details the removal of the oxide layer on the sidewalls substantially completely, while partially removing the oxide layer on the bottom to define the remaining oxide layer as the bottom oxide layer.

Career Highlights

Yew-Jung Chang is associated with Mosel Vitelic Corporation, where he has been instrumental in advancing semiconductor technologies. His work has contributed to the development of more efficient and effective semiconductor devices.

Collaborations

He has collaborated with notable colleagues such as Shih-Chi Lai and Ta-Chung Wu, enhancing the innovation landscape within his field.

Conclusion

Yew-Jung Chang's contributions to semiconductor technology through his patented methods demonstrate his commitment to innovation and excellence in the industry. His work continues to influence advancements in semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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