San Jose, CA, United States of America

Yaw Fann


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2016-2025

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2 patents (USPTO):Explore Patents

Title: Yaw Fann: Innovator in Memory Technology

Introduction

Yaw Fann is a notable inventor based in San Jose, California. He has made significant contributions to the field of memory technology, holding a total of 2 patents. His work focuses on enhancing the efficiency and reliability of memory devices.

Latest Patents

Yaw Fann's latest patents include innovative solutions for memory management. One of his patents, titled "Row tracking for row hammer mitigation," describes a control mechanism that can be implemented in the back-end of a memory sub-system. This mechanism refreshes rows of a memory device based on the frequency of updates within a specified duration. Additionally, it utilizes a pair of counters to implement a ping pong mechanism for data retention. Another patent, "Pseudo-random hardware resource allocation through the plurality of resource controller based on non-repeating sequence of index list entries," outlines methods for pseudo-random hardware resource allocation among various hardware elements. This patent details a systematic approach to request hardware resources efficiently.

Career Highlights

Throughout his career, Yaw Fann has worked with prominent companies in the technology sector. He has been associated with Telefonaktiebolaget Lm Ericsson and Micron Technology Incorporated, where he contributed to advancements in memory technology and hardware resource management.

Collaborations

Yaw Fann has collaborated with notable professionals in his field, including Robert G Hathaway and Ricky See. Their combined expertise has likely contributed to the innovative solutions developed in his patents.

Conclusion

Yaw Fann's contributions to memory technology through his patents demonstrate his commitment to innovation in the field. His work continues to influence advancements in memory device management and hardware resource allocation.

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