Kanagawa, Japan

Yasuteru Araya

This inventor holds 3 USPTO granted patents. Top assignees: Nec Electronics Corporation, Renesas Electronics Corporation. Active years: 2006-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasuteru Araya. Retrieved from https://idiyas.com/inventor/yasuteru-araya

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.5

ph-index = 2

Forward Citations = 8(Granted Patents)


Location History:

  • Kawasaki, JP (2008)
  • Kanagawa, JP (2006 - 2011)

Company Filing History:


Years Active: 2006-2011

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3 patents (USPTO):Explore Patents

Title: Yasuteru Araya: Innovator in Circuit Design

Introduction

Yasuteru Araya is a notable inventor based in Kanagawa, Japan. He has made significant contributions to the field of circuit design, holding a total of 3 patents. His work focuses on enhancing the efficiency and performance of circuit design processes.

Latest Patents

Araya's latest patents include a circuit design device, a circuit design program, and a circuit design method. The circuit design device features a processor that performs operations such as extracting flip-flops that receive a first clock and a control signal from a first hardware description. It generates a second hardware description by replacing the first clock with a second clock and creates a third hardware description by inserting data of a control circuit to stop the supply of the second clock based on the first clock and the control signal.

His bus performance evaluation method for algorithm description is crucial for LSI design and development. This method integrates architecture design, simulation program structuring, and bus performance evaluation processes, all interconnected by a feedback loop. The algorithm design utilizes general-purpose high-level languages like C and C++. The evaluation function counts bus traffic, optimizing the isolation of hardware and software based on bus traffic for processing rates, ultimately reducing the overall turnaround time of design.

Career Highlights

Throughout his career, Yasuteru Araya has worked with prominent companies such as NEC Electronics Corporation and Renesas Electronics Corporation. His experience in these organizations has contributed to his expertise in circuit design and development.

Collaborations

Araya has collaborated with various professionals in the field, including his coworker Yuichi Maruyama. Their joint efforts have further advanced the innovations in circuit design.

Conclusion

Yasuteru Araya's contributions to circuit design through his patents and career experiences highlight his role as an influential inventor in the technology sector. His work continues to impact the efficiency of circuit design processes significantly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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