This inventor holds 2 USPTO granted patents. Top assignee: Fujitsu Corporation. Active years: 2001-2002.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Kawasaki, JP (2001)
- Kanagawa, JP (2002)
Company Filing History:
Years Active: 2001-2002
Title: Yasuo Kamiya: Innovator in Semiconductor Design
Introduction
Yasuo Kamiya is a prominent inventor based in Kanagawa, Japan. He has made significant contributions to the field of semiconductor design, holding a total of 2 patents. His work focuses on improving the layout design and manufacturing methods of integrated circuit devices.
Latest Patents
Kamiya's latest patents include a "Layout Design System of Semiconductor IC Device" and a "Layout Design Method of Semiconductor IC Device and Computer-Readable Recording Medium on Which Programs for Allowing Computer to Execute Respective Means in the System or Respective Steps in the Method Are Recorded." These innovations involve designing floor plans and cell layouts in multiple blocks, generating clock trees to minimize clock skew, and conducting logic simulations for integrated circuit devices.
Career Highlights
Yasuo Kamiya is currently employed at Fujitsu Corporation, where he continues to advance semiconductor technology. His expertise in layout design and integrated circuit manufacturing has positioned him as a key player in the industry.
Collaborations
Kamiya collaborates with fellow inventor Satoru Yoshikawa, contributing to the development of innovative solutions in semiconductor design.
Conclusion
Yasuo Kamiya's work in semiconductor design exemplifies the importance of innovation in technology. His patents and contributions continue to shape the future of integrated circuit devices.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile