Company Filing History:
Years Active: 2011
Title: Yasunari Kanzawa: Innovator in Circuit Design
Introduction
Yasunari Kanzawa is a prominent inventor based in Sunnyvale, CA, known for his contributions to circuit design and testing methodologies. With a total of 2 patents, he has made significant advancements in the field of design-for-test (DFT) logic.
Latest Patents
Kanzawa's latest patents include innovative methods for implementing hierarchical design-for-test logic for modular circuit design. This invention provides methods and apparatuses that allow for the implementation of DFT circuitry dedicated to specific modules. It enables multiple modules to share sequential input and output signals, enhancing the efficiency of testing processes. Another notable patent focuses on increasing scan compression during integrated circuit (IC) design testing through an X-chain method. This method identifies scan cells likely to capture an X and places them on separate X-chains, significantly improving compression without compromising coverage.
Career Highlights
Yasunari Kanzawa is currently employed at Synopsys, Inc., where he continues to develop innovative solutions in circuit design. His work has been instrumental in advancing the capabilities of DFT methodologies, making testing processes more efficient and effective.
Collaborations
Throughout his career, Kanzawa has collaborated with notable colleagues such as Rohit Kapur and Anshuman Chandra. These collaborations have contributed to the development of cutting-edge technologies in the field.
Conclusion
Yasunari Kanzawa's contributions to circuit design and testing methodologies have established him as a key figure in the industry. His innovative patents and collaborative efforts continue to shape the future of design-for-test logic.