Nara, Japan

Yasuaki Murata

This inventor holds 4 USPTO granted patents. Top assignee: Sharp Kabushiki Kaisha Corporation. Active years: 1995-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasuaki Murata. Retrieved from https://idiyas.com/inventor/yasuaki-murata

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.3

ph-index = 3

Forward Citations = 117(Granted Patents)


Location History:

  • Tenri, JP (1995 - 1996)
  • Nara, JP (2000 - 2002)

Company Filing History:


Years Active: 1995-2002

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4 patents (USPTO):Explore Patents

Title: Yasuaki Murata: Semiconductor Device Inventor

Introduction

Yasuaki Murata is an inventor based in Nara, Japan. His work includes semiconductor devices and thin-film transistor technologies, and he is associated with Sharp Kabushiki Kaisha Corporation. The available information lists 4 patents in his portfolio.

Latest Patents

Two of Murata’s latest listed patents concern semiconductor devices and thin-film transistors.

“Semiconductor device, thin film transistor and method for producing the same, and liquid crystal display apparatus and method for producing the same” describes a substrate with a line formed on it and a silicon-containing crystalline semiconductor film connected to that line. The film is crystallized through annealing, during which a material in the line acts as a catalyst.

“Semiconductor device, thin film transistor having an active crystal” describes a similar structure: a substrate, a line, and a connected crystalline semiconductor film containing silicon. In this invention, annealing crystallizes the film with a constituent material of the line functioning as a catalyst.

Career Highlights

Murata’s listed inventions focus on semiconductor fabrication and device structures. The described approach uses a line material to catalyze crystallization during annealing, connecting the device’s structure with its manufacturing process.

Collaborations

The supplied information identifies Atsushi Yoshinouchi and Atsushi Yoshinouci as Murata’s coworkers. It does not specify their roles or particular contributions to the listed patents.

Conclusion

Yasuaki Murata’s listed patent work centers on silicon-based semiconductor devices and thin-film transistors, including techniques that use line materials to support crystallization during production.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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