Yan Pan

Title: Innovations of Yan Pan in Integrated Circuit Technology

Introduction

Yan Pan is an accomplished inventor based in Clifton Park, NY (US). He has made significant contributions to the field of integrated circuit technology, holding a total of 2 patents. His work focuses on systematic defect inspection methods and the development of fail signature databases for integrated circuits.

Latest Patents

Yan Pan's latest patents include a "Systematic defects inspection method with combined eBeam inspection and net tracing classification." This invention provides a method and apparatus for separating real design-related via defects from nuisance defects based on net tracing classification of eBeam VC die comparison inspection results. The process involves performing an eBeam VC die comparison inspection on each via of a plurality of dies, determining DVC vias based on the comparison, and conducting a net tracing classification on the DVC vias. Additionally, he has developed a method for the "Early development of a database of fail signatures for systematic defects in integrated circuit (IC) chips." This method allows for the pre-production run development of a fail signature database, which stores fail signatures for systematic defects and their corresponding root causes.

Career Highlights

Yan Pan is currently employed at GlobalFoundries Inc., where he continues to innovate in the field of semiconductor manufacturing. His work has been instrumental in enhancing the reliability and efficiency of integrated circuits.

Collaborations

Throughout his career, Yan has collaborated with notable colleagues, including Peter Lin and Rao Desineni. These collaborations have further enriched his contributions to the field.

Conclusion

Yan Pan's innovative work in integrated circuit technology demonstrates his commitment to advancing the industry. His patents and methods are paving the way for improved defect detection and prevention in semiconductor manufacturing.