Hsinchu, Taiwan

Ya-Tin Chang

This inventor holds 21 USPTO granted patents and 2 published patent applications, primarily in Delay Lock Loop Circuits. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ya-Tin Chang. Retrieved from https://idiyas.com/inventor/ya-tin-chang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21 

% Patents Active = 90.5

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 13(Granted Patents)


Company Filing History:


Years Active: 2020-2026

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Areas of Expertise:
Delay Lock Loop
Oscillator Synchronization
Phase Noise Measurement
Voltage Controlled Delay Line
Loop Gain Calibration
Phase Skew Generation
Built-In Self Test Circuit
Hybrid Oscillator
21 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Ya-Tin Chang**

Introduction

Ya-Tin Chang, based in Hsinchu, Taiwan, is a prolific inventor known for his contributions to semiconductor technology. With an impressive portfolio of 17 patents to his name, Chang has significantly impacted the field, particularly in areas related to clock signal management and auto calibration.

Latest Patents

Chang's latest innovations include two significant patents. The first, titled **"Loop gain auto calibration using loop gain detector,"** describes a sophisticated device that consists of a phase detector circuit, charge pump circuit, sample and hold circuit, comparator, and controller. This invention allows for the detection of clock skew between a reference signal and an input signal, translating that skew into a voltage for further processing. The comparator's role in this invention is crucial, as it not only detects the loop gain associated with the input signal but also outputs a loop gain signal for necessary adjustments.

The second patent, **"Delay lock loop circuits and methods for operating same,"** introduces methods for operating digital delay lock circuits. This patent includes a phase detector that generates a digital signal indicating the relationship between two clock signals. The subsequent phase accumulator and decoder work together to generate a digital control word, enabling a delay element to modify the phase of one clock signal based on another, enhancing synchronization.

Career Highlights

Ya-Tin Chang is currently employed at Taiwan Semiconductor Manufacturing Company, Limited (TSMC). His work at TSMC places him at the forefront of semiconductor innovation, allowing him to apply his ingenious ideas in real-world applications that are critical for modern technology.

Collaborations

Throughout his career, Chang has collaborated with notable colleagues, including Ruey-Bin Sheen and Chih-Hsien Chang. These collaborations reflect a strong network of innovation and research within TSMC, furthering advancements in semiconductor technology.

Conclusion

Ya-Tin Chang's inventive spirit and technical expertise have resulted in remarkable contributions to the semiconductor field. With 17 patents, including groundbreaking innovations in loop gain calibration and delay lock circuits, Chang continues to push the boundaries of technology, solidifying his reputation as a leading inventor in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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