Fremont, CA, United States of America

Wingcho Fung

This inventor holds 1 USPTO granted patent. Top assignee: Intel Corporation. Active years: 1993.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wingcho Fung. Retrieved from https://idiyas.com/inventor/wingcho-fung

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 53(Granted Patents)


Company Filing History:


Years Active: 1993

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1 patent (USPTO):Explore Patents

Title: Wingcho Fung and the Power-Reducing Buffer/Latch Circuit.

Introduction

Wingcho Fung is an inventor associated with Fremont, California, and Intel Corporation. His patent work includes a circuit designed to reduce power use when driving a data bus.

Latest Patents

Fung is credited with 1 patent: “Power Reducing Buffer/Latch Circuit.” The invention conditionally precharges a data bus only during cycles before data is sampled. An input gate controls when the data signal reaches a latch, while a conditional precharge clears previously latched data. The latch controls a pull-down transistor that drives the bus, and a complementary pull-up transistor precharges it. Delaying the pull-up signal relative to the pull-down signal helps prevent rush-through current in the driver.

Career Highlights

Fung’s listed patent reflects work on data-bus circuitry and power-conscious circuit design. The patent is associated with Intel Corporation.

Collaborations

Fung’s listed coworker is Krishna M. Yellamilli. The available information does not specify the nature of their collaboration.

Conclusion

Wingcho Fung’s patent describes a buffer/latch circuit that coordinates data latching and bus precharging to reduce unnecessary power use and prevent rush-through current.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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