Fort Lauderdale, FL, United States of America

William E Earnshaw

This inventor holds 3 USPTO granted patents. Top assignees: Modular Computer Systems, Inc., Modular Computer Systems, Inc. (Florida Corporation). Active years: 1990-1991.

IDiyas Innovation Intelligence. (2026). Inventor Profile: William E Earnshaw. Retrieved from https://idiyas.com/inventor/william-e-earnshaw-yoonfv8i

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.3

ph-index = 3

Forward Citations = 118(Granted Patents)


Company Filing History:


Years Active: 1990-1991

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3 patents (USPTO):Explore Patents

Title: The Innovations of William E. Earnshaw

Introduction

William E. Earnshaw is a notable inventor based in North Lauderdale, Florida. He holds a total of 3 patents that showcase his contributions to technology, particularly in memory systems and semaphore operations. His work has significantly impacted the efficiency and performance of computing systems.

Latest Patents

One of Earnshaw's latest patents is for a semaphore memory designed to reduce common bus contention to global memory. This invention greatly reduces common bus contention by allowing semaphore test bit and set operations to be performed on each CPU's local bus. The semaphore lock bits are stored locally in high-speed SRAM on each CPU, and coherency of the lock bits is maintained through a bus monitoring logic circuit on each CPU. A CPU wishing to take possession of a semaphore performs a local read of its semaphore memory and spins locally until the lock bit is reset, at which time it performs a local write to set the bit. When the semaphore lock bit is written, it will be updated locally, and at the same time, the write operation will be sent out over the common bus. The bus monitoring logic on every other CPU will recognize the write operation and simultaneously update the corresponding lock bit in each local semaphore memory. This ability to read spin locally relieves the common bus from the great amount of traffic that occurs in typical systems that maintain the semaphore lock bits in common global memory.

Another significant patent is for an error connection device for parity protected memory systems. This invention utilizes a redundant memory subsystem, memory flow control, and a method of copying (scrubbing) data from one memory subsystem to the corresponding location in another. This provides correction of soft errors in a parity protected memory system without degrading the performance of the memory system except when an error occurs. A copy of the correct data is also provided to the memory system when a location in either of the memory subsystems experiences a hard error.

Career Highlights

Throughout his career, Earnshaw has worked with Modular Computer Systems, Inc., contributing to advancements in computer technology. His innovative approaches have led to significant improvements in memory management and error correction.

Collaborations

Earnshaw has collaborated with notable individuals in the field, including Steven J. McKinney and Jay Howell. Their combined expertise has fostered an environment of innovation and technological advancement.

Conclusion

William E. Earnshaw's

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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