Wendel Dieter

Title: Wendel Dieter: Patent Inventor in Clock-Design Technology

Introduction

Wendel Dieter is an inventor associated with Schoenaich, Germany, and International Business Machines Corporation. His patent work addresses clock-signal generation and compatibility between two design approaches.

Latest Patents

Dieter is credited with 1 patent: “LSSD Compatibility for GSD Unified Global Clock Buffers.” The patent describes generating level-sensitive scan design (LSSD) clock signals from a general scan design (GSD) clock buffer. It uses an intermediate clock signal and mode-control signals to produce multiple LSSD clock signals, while the buffer can also generate GSD clock signals when operating in GSD mode.

Career Highlights

Dieter’s documented patent contribution focuses on adapting a unified global clock buffer to support both LSSD and GSD clocking. The described method generates an intermediate signal from the buffer’s input section in response to a GSD mode signal, then uses the output section and control signals to generate LSSD clock signals.

Collaborations

Dieter’s listed coworkers include James Douglas Warnock and Leon Jacob Sigal. The patent is associated with International Business Machines Corporation.

Conclusion

Wendel Dieter’s recorded invention concerns flexible clock-signal generation, enabling a GSD clock buffer to support LSSD operation as well as GSD clocking.