Kaohsiung, Taiwan

Wen Jin Huang

This inventor holds 2 USPTO granted patents. Top assignee: Advanced Semiconductor Engineering, Inc.. Active years: 2023-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wen Jin Huang. Retrieved from https://idiyas.com/inventor/wen-jin-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2023-2024

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Innovations of Wen Jin Huang in Semiconductor Technology

Introduction

Wen Jin Huang is a notable inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of semiconductor technology, holding two patents that showcase his innovative approach to device packaging.

Latest Patents

Huang's latest patents include a semiconductor device package and a method of manufacturing the same. This semiconductor device package features a substrate with a surface, a conductive element placed on the substrate's surface, and an encapsulant that covers the conductive element. The conductive element has an upper surface that faces away from the substrate and is exposed from the encapsulant. Notably, the roughness of the upper surface of the conductive element is greater than that of its side surface, enhancing its performance and reliability.

Career Highlights

Wen Jin Huang is currently employed at Advanced Semiconductor Engineering, Inc., where he continues to develop innovative solutions in semiconductor packaging. His work has been instrumental in advancing the efficiency and effectiveness of semiconductor devices.

Collaborations

Huang collaborates with talented colleagues, including Wei Da Lin and Meng-Jen Wang, who contribute to the innovative environment at Advanced Semiconductor Engineering, Inc.

Conclusion

Wen Jin Huang's contributions to semiconductor technology through his patents reflect his dedication to innovation in the field. His work not only enhances device performance but also sets a foundation for future advancements in semiconductor packaging.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…