Tainan, Taiwan

Wei-Chih Cheng

This inventor holds 1 USPTO granted patent and 6 published patent applications. Top assignee: Vanguard International Semiconductor Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wei-Chih Cheng. Retrieved from https://idiyas.com/inventor/wei-chih-cheng-h9no02jf

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Wei-Chih Cheng: Innovator in Semiconductor Technology

Introduction

Wei-Chih Cheng is an inventor based in Tainan City, Taiwan. He is known for his contributions to semiconductor technology, particularly in the development of high electron mobility transistors and semiconductor devices. Although he currently holds no granted patents, his innovative work is reflected in his latest patent applications.

Latest Patent Applications

Wei-Chih Cheng has filed several notable patent applications, including:

1. **HIGH ELECTRON MOBILITY TRANSISTOR AND FABRICATION METHOD THEREOF** - This application describes a high electron mobility transistor that includes a semiconductor channel layer and a semiconductor barrier layer disposed on a substrate in sequence. A source electrode and a drain electrode are placed on the semiconductor channel layer. Additionally, a semiconductor cap layer is situated on the semiconductor barrier layer, with a first dielectric layer covering the source electrode, semiconductor cap layer, and drain electrode. A first via extends downward onto the semiconductor cap layer, and a gate electrode is positioned on the first dielectric layer in contact with the first via. The design also incorporates a first field plate and a second field plate that is in contact with the first field plate.

2. **SEMICONDUCTOR DEVICE** - This application outlines a semiconductor device that consists of a semiconductor channel layer and a semiconductor barrier layer on a substrate. A passivation layer covers the semiconductor barrier layer. The device features a first gate electrode and a second gate electrode that are laterally separated and partially embedded in the passivation layer. The source electrode and drain electrode are placed on the semiconductor channel layer, with the second gate electrode electrically connected to the source electrode. The first and second gate electrodes are electrically isolated from each other, with the first gate length being shorter than the second gate length.

Conclusion

Wei-Chih Cheng is an emerging inventor in the field of semiconductor technology, with innovative patent applications that showcase his expertise. His work in high electron mobility transistors and semiconductor devices highlights the potential for future advancements in this critical area of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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