Wai Lok Lee

Title: Innovations by Wai Lok Lee in Semiconductor Manufacturing

Introduction

Wai Lok Lee is a notable inventor based in Singapore, recognized for his contributions to semiconductor manufacturing. He has developed a significant patent that addresses challenges in the etching process of metal lines, which is crucial for the fabrication of integrated circuits.

Latest Patents

Wai Lok Lee holds a patent titled "Method to reduce microloading in metal etching." This innovative method describes a process for etching metal lines with a reduced microloading effect. The patent outlines a technique involving semiconductor device structures on a substrate, covered with an insulating layer. A barrier metal layer is deposited over the insulating layer, followed by a metal layer. The metal layer is then covered with a photoresist mask that features both wide and narrow spaces. The etching process selectively removes the metal layer and barrier metal layer, ultimately allowing for the completion of metal lines without microloading.

Career Highlights

Wai Lok Lee is associated with Chartered Semiconductor Manufacturing Ltd, a prominent corporation in the semiconductor industry. His work has significantly impacted the efficiency and effectiveness of metal etching processes in semiconductor device fabrication.

Collaborations

Wai Lok Lee has collaborated with esteemed colleagues such as Paul Kwok Keung Ho and Thomas Schulue, contributing to advancements in semiconductor technologies.

Conclusion

Wai Lok Lee's innovative approach to reducing microloading in metal etching exemplifies the importance of continuous improvement in semiconductor manufacturing. His contributions are vital for the advancement of integrated circuit fabrication.