Brossard, Canada

Vinod K Agarwal

This inventor holds 3 USPTO granted patents. Top assignee: Northern Telecom Limited. Active years: 1990-1994.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Vinod K Agarwal. Retrieved from https://idiyas.com/inventor/vinod-k-agarwal-a0yr7j51

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 3

Forward Citations = 84(Granted Patents)


Company Filing History:


Years Active: 1990-1994

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3 patents (USPTO):Explore Patents

Title: Vinod K Agarwal: Innovator in Integrated Circuit Testing

Introduction

Vinod K Agarwal is a notable inventor based in Brossard, Canada. He has made significant contributions to the field of integrated circuit testing, holding a total of 3 patents. His work focuses on enhancing the efficiency and effectiveness of testing digital systems.

Latest Patents

Agarwal's latest patents include innovative designs that address critical challenges in integrated circuit testing. One of his patents, titled "Scan cell for weighted random pattern generation and method for its," describes a scan cell that comprises a flip-flop, a mode selector, and a weighting network. This design allows for the generation of weighted random patterns in scan chains, which is essential for scan testing digital systems. Another patent, "Integrated circuit testing method and apparatus," outlines a method for testing integrated circuits by comparing the binary vectors generated from two identical circuits. This approach helps manage the vast amounts of data produced by increasingly complex devices.

Career Highlights

Vinod K Agarwal is currently employed at Northern Telecom Limited, where he continues to innovate in the field of integrated circuit testing. His work has been instrumental in developing methods that improve the reliability and accuracy of testing processes.

Collaborations

Agarwal has collaborated with several talented individuals in his field, including Benoit Nadeau-Dostie and Fidel Muradali. These collaborations have contributed to the advancement of technology in integrated circuit testing.

Conclusion

Vinod K Agarwal's contributions to integrated circuit testing through his patents and innovative methods have made a significant impact in the industry. His work continues to pave the way for advancements in digital system testing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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