Bengaluru, India

Vijayalakshmi Ranganna

USPTO Granted Patents = 1 

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 15(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):

Title: Vijayalakshmi Ranganna: Innovator in Adaptive Standard Cell Architecture

Introduction

Vijayalakshmi Ranganna is a prominent inventor based in Bengaluru, India. She has made significant contributions to the field of digital system design, particularly in the area of standard cell architecture. Her innovative work has led to advancements that enhance the efficiency and performance of digital systems.

Latest Patents

Vijayalakshmi holds a patent for "Adaptive standard cell architecture and layout techniques for low area digital SoC." This patent describes a standard cell CMOS device that includes a first power rail connected to one of two voltage levels. The design features a second power rail and a set of CMOS transistor devices that optimize the layout for reduced area in digital systems. This innovation is crucial for the development of compact and efficient digital System on Chips (SoCs).

Career Highlights

Vijayalakshmi is currently employed at Qualcomm Incorporated, a leading company in the field of telecommunications and semiconductor technology. Her role at Qualcomm allows her to work on cutting-edge technologies that shape the future of mobile and digital communications.

Collaborations

Throughout her career, Vijayalakshmi has collaborated with notable colleagues, including Jay Madhukar Shah and Kamesh Medisetti. These collaborations have fostered an environment of innovation and creativity, contributing to the success of their projects.

Conclusion

Vijayalakshmi Ranganna is a trailblazer in the field of adaptive standard cell architecture, with a patent that showcases her expertise and innovative spirit. Her work at Qualcomm and collaborations with esteemed colleagues highlight her significant impact on the industry.

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