Vidyadhara Bellipaddy

Title: Innovations of Vidyadhara Bellipaddy

Introduction

Vidyadhara Bellipaddy is an accomplished inventor based in San Jose, CA. He is known for his significant contributions to the field of error detection and correction in FPGA architecture. His innovative work has led to the development of a patented technology that enhances the reliability of FPGA systems.

Latest Patents

Vidyadhara holds a patent for an "Error-detecting and correcting FPGA architecture." This invention provides a method and apparatus for an error-correcting FPGA. The technology involves generating ECC data for configuration, which is programmed into the ECC rows in the configuration memory. During the booting process, an integrity-check bit is evaluated to determine if an integrity check is necessary. If a single-bit error is detected, the system intelligently reprograms the erroneous memory location based on the type of error. This innovative approach ensures that FPGA systems can maintain integrity and reliability even in the presence of errors.

Career Highlights

Vidyadhara is currently employed at Actel Corporation, Inc., where he continues to work on advanced technologies in the field of FPGA design. His expertise and innovative mindset have made him a valuable asset to the company.

Collaborations

One of his notable coworkers is Gregory William Bakker, with whom he has collaborated on various projects within the company. Their combined efforts contribute to the advancement of technology in their field.

Conclusion

Vidyadhara Bellipaddy's work in error detection and correction for FPGA architecture showcases his innovative spirit and dedication to improving technology. His contributions are significant in enhancing the reliability of electronic systems.